Logic Synthesis for Low Power VLSI Designs
Springer US
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Timeline
| Chapter title |
Logic Minimization for Low Power
|
|---|---|
| Chapter number | 6 |
| Book title |
Logic Synthesis for Low Power VLSI Designs
|
| Published by |
Springer, Boston, MA, January 1998
|
| DOI | 10.1007/978-1-4615-5453-0_6 |
| Book ISBNs |
978-1-4613-7490-9, 978-1-4615-5453-0
|
| Authors |
Sasan Iman, Massoud Pedram, Iman, Sasan, Pedram, Massoud |