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Formal Methods in Computer-Aided Design

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Cover of 'Formal Methods in Computer-Aided Design'

Table of Contents

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    Book Overview
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    Chapter 1 Applications of Hierarchical Verification in Model Checking
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    Chapter 2 Trends in Computing
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    Chapter 3 A Case Study in Formal Verification of Register-Transfer Logic with ACL2: The Floating Point Adder of the AMD Athlon TM Processor
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    Chapter 4 An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps
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    Chapter 5 Automated Refinement Checking for Asynchronous Processes
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    Chapter 6 Border-Block Triangular Form and Conjunction Schedule in Image Computation
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    Chapter 7 B2M: A Semantic Based Tool for BLIF Hardware Descriptions
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    Chapter 8 Checking Safety Properties Using Induction and a SAT-Solver
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    Chapter 9 Combining Stream-Based and State-Based Verification Techniques
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    Chapter 10 A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles
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    Chapter 11 Correctness of Pipelined Machines
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    Chapter 12 Do You Trust Your Model Checker?
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    Chapter 13 Executable Protocol Specification in ESL
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    Chapter 14 Formal Verification of Floating Point Trigonometric Functions
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    Chapter 15 Hardware Modeling Using Function Encapsulation
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    Chapter 16 A Methodology for the Formal Analysis of Asynchronous Micropipelines
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    Chapter 17 A Methodology for Large-Scale Hardware Verification
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    Chapter 18 Model Checking Synchronous Timing Diagrams
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    Chapter 19 Model Reductions and a Case Study
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    Chapter 20 Modeling and Parameters Synthesis for an Air TrafficManagement System
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    Chapter 21 Monitor-Based Formal Specification of PCI
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    Chapter 22 SAT-Based Image Computation with Application in Reachability Analysis
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    Chapter 23 SAT-Based Verification without State Space Traversal
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    Chapter 24 Scalable Distributed On-the-Fly Symbolic Model Checking
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    Chapter 25 The Semantics of Verilog Using Transition System Combinators
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    Chapter 26 Sequential Equivalence Checking by Symbolic Simulation
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    Chapter 27 Speeding Up Image Computation by Using RTL Information
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    Chapter 28 Symbolic Checking of Signal-Transition Consistency for Verifying High-Level Designs
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    Chapter 29 Symbolic Simulation with Approximate Values
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    Chapter 30 A Theory of Consistency for Modular Synchronous Systems
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    Chapter 31 Verifying Transaction Ordering Properties in Unbounded Bus Networks through Combined Deductive/Algorithmic Methods
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    Chapter 32 Visualizing System Factorizations with Behavior Tables
Attention for Chapter 8: Checking Safety Properties Using Induction and a SAT-Solver
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Chapter title
Checking Safety Properties Using Induction and a SAT-Solver
Chapter number 8
Book title
Formal Methods in Computer-Aided Design
Published by
Springer, Berlin, Heidelberg, November 2000
DOI 10.1007/3-540-40922-x_8
Book ISBNs
978-3-54-041219-9, 978-3-54-040922-9
Authors

Mary Sheeran, Satnam Singh, Gunnar Stålmarck, Sheeran, Mary, Singh, Satnam, Stålmarck, Gunnar

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 76 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
United States 3 4%
Sweden 2 3%
Hungary 1 1%
France 1 1%
Germany 1 1%
Netherlands 1 1%
Italy 1 1%
Unknown 66 87%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 36 47%
Student > Master 13 17%
Researcher 11 14%
Professor 4 5%
Student > Bachelor 3 4%
Other 3 4%
Unknown 6 8%
Readers by discipline Count As %
Computer Science 52 68%
Engineering 13 17%
Arts and Humanities 1 1%
Mathematics 1 1%
Unspecified 1 1%
Other 2 3%
Unknown 6 8%