Logic Synthesis for Low Power VLSI Designs
Springer US
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Timeline
Mendeley readers
| Chapter title |
Two-Level Logic Minimization in PLAs
|
|---|---|
| Chapter number | 4 |
| Book title |
Logic Synthesis for Low Power VLSI Designs
|
| Published by |
Springer, Boston, MA, January 1998
|
| DOI | 10.1007/978-1-4615-5453-0_4 |
| Book ISBNs |
978-1-4613-7490-9, 978-1-4615-5453-0
|
| Authors |
Sasan Iman, Massoud Pedram, Iman, Sasan, Pedram, Massoud |
Mendeley readers
The data shown below were compiled from readership statistics for 3 Mendeley readers of this research output. Click here to see the associated Mendeley record.
Geographical breakdown
| Country | Count | As % |
|---|---|---|
| Unknown | 3 | 100% |
Demographic breakdown
| Readers by professional status | Count | As % |
|---|---|---|
| Student > Bachelor | 1 | 33% |
| Researcher | 1 | 33% |
| Unknown | 1 | 33% |
| Readers by discipline | Count | As % |
|---|---|---|
| Computer Science | 2 | 67% |
| Unknown | 1 | 33% |