↓ Skip to main content

Architecture of Computing Systems - ARCS 2017

Overview of attention for book
Cover of 'Architecture of Computing Systems - ARCS 2017'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 Effectiveness of Software-Based Hardening for Radiation-Induced Soft Errors in Real-Time Operating Systems
  3. Altmetric Badge
    Chapter 2 Fault-Tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support
  4. Altmetric Badge
    Chapter 3 OpenCL-Based 6D-Vision on Heterogeneous System on Chips
  5. Altmetric Badge
    Chapter 4 Hardware-Accelerated Radix-Tree Based String Sorting for Big Data Applications
  6. Altmetric Badge
    Chapter 5 Boosting Java Performance Using GPGPUs
  7. Altmetric Badge
    Chapter 6 A Low Noise Unikernel for Extrem-Scale Systems
  8. Altmetric Badge
    Chapter 7 A New Approach to Detecting Execution Phases Using Performance Monitoring Counters
  9. Altmetric Badge
    Chapter 8 Adaptive and Scalable Predictive Page Policies for High Core-Count Server CPUs
  10. Altmetric Badge
    Chapter 9 A Method for Fast Evaluation of Sharing Set Management Strategies in Cache Coherence Protocols
  11. Altmetric Badge
    Chapter 10 HBM-Resident Prefetching for Heterogeneous Memory System
  12. Altmetric Badge
    Chapter 11 Reduced Complexity Many-Core: Timing Predictability Due to Message-Passing
  13. Altmetric Badge
    Chapter 12 Parallel Forwarding for Efficient Bandwidth Utilization in Networks-on-Chip
  14. Altmetric Badge
    Chapter 13 PLSS: A Scheduler for Multi-core Embedded Systems
  15. Altmetric Badge
    Chapter 14 Exploring ILP and TLP on a Polymorphic VLIW Processor
  16. Altmetric Badge
    Chapter 15 Scheduling of Datacompression on Distributed Systems with Time- and Event-Triggered Messages
  17. Altmetric Badge
    Chapter 16 Semi-partitioned Mixed-Criticality Scheduling
  18. Altmetric Badge
    Chapter 17 DVFS Space Exploration in Power Constrained Processing-in-Memory Systems
  19. Altmetric Badge
    Chapter 18 Reducing Data Center Resource Over-Provisioning Through Dynamic Load Management for Virtualized Network Functions
  20. Altmetric Badge
    Chapter 19 Dynamic Power Management in a Heterogeneous Processor Architecture
Attention for Chapter 2: Fault-Tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support
Altmetric Badge

Readers on

mendeley
7 Mendeley
You are seeing a free-to-access but limited selection of the activity Altmetric has collected about this research output. Click here to find out more.
Chapter title
Fault-Tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support
Chapter number 2
Book title
Architecture of Computing Systems - ARCS 2017
Published by
Springer, Cham, April 2017
DOI 10.1007/978-3-319-54999-6_2
Book ISBNs
978-3-31-954998-9, 978-3-31-954999-6
Authors

Florian Haas, Sebastian Weis, Theo Ungerer, Gilles Pokam, Youfeng Wu

Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 7 Mendeley readers of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 7 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 3 43%
Student > Master 2 29%
Researcher 1 14%
Unknown 1 14%
Readers by discipline Count As %
Computer Science 6 86%
Unknown 1 14%