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Automated Technology for Verification and Analysis

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Cover of 'Automated Technology for Verification and Analysis'

Table of Contents

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    Book Overview
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    Chapter 2 Dynamic Shielding for Reinforcement Learning in Black-Box Environments
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    Chapter 5 SISL: Concolic Testing of Structured Binary Input Formats via Partial Specification
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    Chapter 6 Fence Synthesis Under the C11 Memory Model
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    Chapter 7 Checking Scheduling-Induced Violations of Control Safety Properties
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    Chapter 8 Symbolic Runtime Verification for Monitoring Under Uncertainties and Assumptions
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    Chapter 9 Handling Polynomial and Transcendental Functions in SMT via Unconstrained Optimisation and Topological Degree Test
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    Chapter 10 Verification of SMT Systems with Quantifiers
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    Chapter 11 Projected Model Counting: Beyond Independent Support
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    Chapter 12 Minimization of Automata for Liveness Languages
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    Chapter 13 Temporal Causality in Reactive Systems
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    Chapter 14 PDAAAL: A Library for Reachability Analysis of Weighted Pushdown Systems
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    Chapter 15 Learning Deterministic One-Clock Timed Automata via Mutation Testing
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    Chapter 16 Active Learning of One-Clock Timed Automata Using Constraint Solving
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    Chapter 17 Learning and Characterizing Fully-Ordered Lattice Automata
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    Chapter 18 Optimistic and Topological Value Iteration for Simple Stochastic Games
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    Chapter 19 Alternating Good-for-MDPs Automata
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    Chapter 20 PET – A Partial Exploration Tool for Probabilistic Verification
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    Chapter 21 STOMPC: Stochastic Model-Predictive Control with  Uppaal Stratego
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    Chapter 22 Synthesis of Parametric Hybrid Automata from Time Series
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    Chapter 23 Optimal Repair for Omega-Regular Properties
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    Chapter 24 Repairing Real-Time Requirements
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    Chapter 25 An Abstraction-Refinement Approach to Verifying Convolutional Neural Networks
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    Chapter 26 Prioritizing Corners in OoD Detectors via Symbolic String Manipulation
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    Chapter 27 POLAR: A Polynomial Arithmetic Framework for Verifying Neural-Network Controlled Systems
Attention for Chapter 7: Checking Scheduling-Induced Violations of Control Safety Properties
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Chapter title
Checking Scheduling-Induced Violations of Control Safety Properties
Chapter number 7
Book title
Automated Technology for Verification and Analysis
Published by
Springer, Cham, January 2022
DOI 10.1007/978-3-031-19992-9_7
Book ISBNs
978-3-03-119991-2, 978-3-03-119992-9
Authors

Yeolekar, Anand, Metta, Ravindra, Hobbs, Clara, Chakraborty, Samarjit

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Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 1 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 1 100%
Readers by discipline Count As %
Computer Science 1 100%