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Embedded Computer Systems: Architectures, Modeling, and Simulation

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Cover of 'Embedded Computer Systems: Architectures, Modeling, and Simulation'

Table of Contents

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    Book Overview
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    Chapter 1 High-Level Synthesis of Digital Circuits from Template Haskell and SDF-AP
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    Chapter 2 Implementing Synthetic Aperture Radar Backprojection in Chisel – A Field Report
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    Chapter 3 EasyHBM: Simple and Fast HBM Access for FPGAs Using High-Level-Synthesis
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    Chapter 4 TREAM: A Tool for Evaluating Error Resilience of Tree-Based Models Using Approximate Memory
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    Chapter 5 Split’n’Cover: ISO 26262 Hardware Safety Analysis with SystemC
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    Chapter 6 Tagged Geometric History Length Access Interval Prediction for Tightly Coupled Memory Systems
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    Chapter 7 NanoController: A Minimal and Flexible Processor Architecture for Ultra-Low-Power Always-On System State Controllers
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    Chapter 8 ControlPULP: A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration
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    Chapter 9 CASA: An Approach for Exposing and Documenting Concurrency-Related Software Properties
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    Chapter 10 High-Level Simulation of Embedded Software Vulnerabilities to EM Side-Channel Attacks
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    Chapter 11 A Design Space Exploration Methodology for Enabling Tensor Train Decomposition in Edge Devices
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    Chapter 12 Study of DNN-Based Ragweed Detection from Drones
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    Chapter 13 PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning
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    Chapter 14 The Impact of Dynamic Storage Allocation on CPython Execution Time, Memory Footprint and Energy Consumption: An Empirical Study
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    Chapter 15 Application Runtime Estimation for AURIX Embedded MCU Using Deep Learning
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    Chapter 16 A Hybrid Performance Prediction Approach for Fully-Connected Artificial Neural Networks on Multi-core Platforms
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    Chapter 17 A Smart HW-Accelerator for Non-uniform Linear Interpolation of ML-Activation Functions
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    Chapter 18 Hardware-Aware Evolutionary Filter Pruning
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    Chapter 19 Obfuscating the Hierarchy of a Digital IP
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    Chapter 20 On the Effectiveness of True Random Number Generators Implemented on FPGAs
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    Chapter 21 SIDAM: A Design Space Exploration Framework for Multi-sensor Embedded Systems Powered by Energy Harvesting
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    Chapter 22 A Data-Driven Approach to Lightweight DVFS-Aware Counter-Based Power Modeling for Heterogeneous Platforms
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    Chapter 23 A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions
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    Chapter 24 SafeDX: Standalone Modules Providing Diverse Redundancy for Safety-Critical Applications
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    Chapter 25 HW/SW Acceleration of Multiple Workloads Within the SERRANO’s Computing Continuum
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    Chapter 26 LSTM Acceleration with FPGA and GPU Devices for Edge Computing Applications in B5G MEC
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    Chapter 27 The TEXTAROSSA Approach to Thermal Control of Future HPC Systems
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    Chapter 28 Correction to: Obfuscating the Hierarchy of a Digital IP
Attention for Chapter 23: A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions
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Chapter title
A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions
Chapter number 23
Book title
Embedded Computer Systems: Architectures, Modeling, and Simulation
Published by
Springer, Cham, January 2022
DOI 10.1007/978-3-031-15074-6_23
Book ISBNs
978-3-03-115073-9, 978-3-03-115074-6
Authors

Sudarshan, Chirag, Sadi, Mohammad Hassani, Steiner, Lukas, Weis, Christian, Wehn, Norbert

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Mendeley readers

Mendeley readers

The data shown below were compiled from readership statistics for 1 Mendeley reader of this research output. Click here to see the associated Mendeley record.

Geographical breakdown

Country Count As %
Unknown 1 100%

Demographic breakdown

Readers by professional status Count As %
Student > Ph. D. Student 1 100%
Student > Master 1 100%
Readers by discipline Count As %
Engineering 2 200%